The disclosed embodiments relate to semiconductor devices and, more particularly, to three-dimensional (3D) semiconductor devices.
Semiconductor devices are becoming more highly integrated to provide high performance and low costs thereof. The integration density of semiconductor devices affects the costs of the semiconductor devices, so highly integrated semiconductor devices are demanded. An integration degree of a conventional two-dimensional (2D) or planar memory device may be mainly determined by a planar area of a unit memory cell. Thus, the integration density of the conventional 2D memory device may be greatly affected by a technique for forming fine patterns. However, forming the fine patterns is typically an expensive procedure that has a certain limitation in increasing the integration density.
Three-dimensional (3D) semiconductor devices including three-dimensionally arranged memory cells have been developed to overcome the above limitations.